Popis produktu: * Rozšiřující set Rally Carrera GO!!! i Dig. 143 Balení obsahuje: * 2 ks rovného dílu 342 mm "Rally / Asfalt" * 2 ks jednostranně zúžené rovinky 342 mm "Rally" * 2 ks zatáčky 1/90° "Rally" * 12 ks jednostranné spony * Výrobce: Carrera Rozměry výrobku: Hmotnost (kg): 0.800 Výška (cm): 20.00 Šířka (cm): 15.00 Hloubka (cm): 3.00 Rozměry balení: Hmotnost (kg): 0.800 Výška (cm): 20.00 Šířka (cm): 15.00 Hloubka (cm): 3.00 EAN: 4007486616431* Host Bus: 1-lane 2.5 Gb/s PCI Express * Eight (8) isochronous transmit/receive contexts * Deep 8 Kbyte isochronous transmit/receive FIFO’s * Complies with 1394 OHCI draft 1.2 * Three external 1394 ports * Bilingual ports with Screw Holes for Jackscrew Type Plug Cable The FWB-PCIE1X21B combines an OHCI (Open Host Controller Interface) and a high-performance, standards-compliant PCI Express 1.1 host system interface to provide S800 1394b-2002 compliant throughput in a small PCB (Printed Circuit Board) and low power dissipation. MultipleVCs (Virtual Channels) on the PCI Express link provide native support for QoS (Quality of Service) transmission for real-time and multimedia applications in a standards-based framework, ensuring compatibility with current and future operating systems. Active-state power management allows dynamic power management during periods of reduced network activity. Technical Specification PCI Express: * Designed for compliance with PCI Express. * Multiple virtual channel (VC0,VC1 ) support fordiffe-rentiating 1394 isochronous traffic. * Supports eight user-programmable traffic classes. * 64-bit and 32-bit platform support. * Interrupts via legacy INTx interface or message sig-naled interrupt (MSI). * Supports PCI Express clock power management viaCLKREQN signal for form factors that support thisprotocol. * Supports all linkpowermanagement states (L0,L0s,L1,andL2/L3) and active state power management(ASPM). * Supports wake-up from a low-power state via in-bandbeacon signaling and side-band WAKE N signal. OHCI (Open Host Controller Interface) * Enhanced with the OHCI 1.2 draft specification for 1394b-2002 PHY full operational compliance. * OHCI 1.0 backwards compatible. Configurable via EEPROM to operate in either OHCI 1.0 or OHCI 1.1 mode. * 8 Kbyte isochronous transmit FIFO. * 4 Kbyte asynchronous transmit FIFO. * 8 Kbyte isochronous receive FIFO. * 8 Kbyte asynchronous receive FIFO. * Dedicated asynchronous and isochronous descriptor-based DMA engines. * Eight isochronous transmit contexts. * Eight isochronous receive contexts. * Supports parallel processing of incoming physical read and write requests. * Supports up to 48-bit addressing per OHCI specifica-tion for the physical DMA transfers. 1394b-2002 Link * Cycle master and isochronous resource manager capable. * Supports 1394a-2000 and 1394b-2002 acceleration features. 1394b-2002 PHY * Provides three IEEER 1394b-2002 compliant ports sup-porting 1394b-2002 speeds of 800 Mbits/s and 400Mbits/s while maintaining backward compat